ADT7518
Rev. A | Page 38 of 40
D7
D6
D5
D4
D3
D2
D1
X
X
X
X
X
X
X
D0
X
CS
SCLK
DIN
DOUT
1
8
1
8
X
X
X
X
X
X
X
D6
D5
D4
D3
D2
D1
D0
X
D7
CS (CONTINUED)
SCLK (CONTINUED)
DIN (CONTINUED)
DOUT (CONTINUED)
STOP
X
X
X
X
X
X
X
X
1
8
D7
D6
D5
D4
D3
D2
D1
D0
START
READ COMMAND
DATA BYTE 1
DATA BYTE 2
Figure 62. SPIReading Two Bytes of Data From Two Sequential Registers
CS
SPI
READ OPERATION
WRITE OPERATION
Figure 63. SPICorrect Use of CS
During SPI Communication
SMBus/SPI INT/INT
The ADT7518 INT/INT
output is an interrupt line for devices
that want to trade their ability to master for an extra pin. It is a
slave device and uses the SMBus/SPI INT/
INT
to signal the host
device that it wants to talk to. The SMBus/SPI INT/INT
on the
ADT7518 is used as an over/under limit indicator.
The INT/
INT
pin has an open-drain configuration that allows
the outputs of several devices to be wired-ANDed together
when the INT/INT
pin is active low. Use C6 of the Control
Config-uration 1 register to set the active polarity of the
INT/
INT
out-put. The power-up default is active low. The
INT/INT
output can be disabled or enabled by setting C5 of the
Control Config-uration 1 register to 1 or 0, respectively.
The INT/INT
output becomes active when either the internal
temperature value, the external temperature value, V
DD
value, or
any of the AIN input values exceed the values in their corres-
ponding T
HIGH
/V
HIGH
or T
LOW
/V
LOW
registers. The INT/
INT
out-
put goes inactive again when a conversion result has the
measured value back within the trip limits and when the status
register associated with the out-of-limit event is read. The two
interrupt status registers show which event caused the INT/
INT
pin to go active.
The INT/
INT
output requires an external pull-up resistor. This
can be connected to a voltage different from VDD, provided the
maximum voltage rating of the INT/INT
output pin is not
exceeded. The value of the pull-up resistor depends on the
application but should be large enough to avoid excessive sink
currents at the INT/
INT
output, which can heat the chip and
affect the temperature reading.
SMBUS ALERT RESPONSE
The INT/INT
pin behaves the same way as an SMBus alert pin
when the SMBus/I
2
C interface is selected. It is an open-drain
output and requires a pull-up to V
DD
. Several INT/
INT
outputs
can be wire-ANDed together, so that the common line will go
low if one or more of the INT/INT
outputs goes low. The polar-
ity of the INT/
INT
pin must be set active low for a number of
outputs to be wire-ANDed together.
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